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ir1161lpbf 1 www.irf.com ? 20 15 international rectifier submit datasheet feedback june 1 , 2015 smartrectifier tm control ic features ? secondary side synchronous rectification controller ? dcm, crcm f lyback and r esonant half - bridge topologies ? direct sensing of mosfet drain voltage up to 200v ? max 500 k hz switching frequency ? anti - bounce logic and uvlo protection ? micropower start - up & ultra - low quiescent current ? 5 0ns turn - off propagation delay ? programmable minimum on time ? vcc operating voltage range 4.75v to 18 v ? cycle by cycle mot check circuit ? lead - free ? compatible with 0.3 w standby, energy star, cecp, etc. applications ? charger, ac - dc adapters product summary topology flyback, resonant half - bridge vd 200v v cc 4.75v ~ 18v i o+ & i o - +1a & - 2.5 a turn on propagation delay 50ns (typical) turn off propagation delay 5 0ns (typical) package options 5 - pin sot - 23 application diagram ordering information base part number package type standard pack complete part number form quantity ir1161lpbf 5l - sot - 23 tape and reel 3000 ir1161ltrpbf p r i m a r y c o n t r o l l e r l o a d 5 4 1 2 3 i r 1 1 6 1 v c c g a t e g n d v d m o t + -
ir1161lpbf 2 www.irf.com ? 20 15 international rectifier submit datasheet feedback june 1 , 2015 table of contents page ordering information 1 description 3 absolute maximum ratings 4 e lectrical characteristics 5 functional block diagram 7 input/output pin equivalent circuit diagram 8 pin definitions 9 pin assignments 9 application information and additional details 1 1 package details 18 tape and reel details 19 part marking information 21 qualification information 22
ir1161lpbf 3 www.irf.com ? 20 15 international rectifier submit datasheet feedback june 1 , 2015 description the ir1161 is a synchronous rectification control ic designed to drive an n - channel power mosfet in a secondary output rectifier circuit. the mosfet gate is switched on and off to bypass its body diode during the of the conduction period to min imize power dissipation , remaining off during the blocking period . the drain to source voltage is accurately sensed to determine the direction and magnitude of the c urrent allowing the ir1161 to turn the mosfet on and off at close to zero current . an int egrated cycle - by - cycle minimum on time ( mot ) protection circuit automatically detect s a no load condition and turn s off the gate driver output preventing negative current from flowing through the mosfet . ruggedness and noise immunity are accomplished usi ng an advanced blanking scheme and double - pulse suppression , which allow s reliable operation in all operating modes.
ir1161lpbf 4 www.irf.com ? 20 15 international rectifier submit datasheet feedback june 1 , 2015 absolute maximum ratings absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. all voltage parameters are absolute voltages referenced to gnd , all currents are defined positive into any pin . the thermal resistance and power dissipation rat ings are measured under board mounted and still air conditions. ? ? ? recommended operating conditions for proper operation the device should be used within the recommended conditions. symbol definition min. max. units v cc supply voltage 4.75 18 v v d drain sense voltage - 3 ?? 200 - 40 125 ?? v d recommended component values symbol component min. max. units r mot mot pin resistor value 5 100 k ? cv cc v cc decoupling capacitor value 1 f
ir1161lpbf 5 www.irf.com ? 20 15 international rectifier submit datasheet feedback june 1 , 2015 electrical characteristics v cc =12 v and t a = 25c unless otherwise specified. the output voltage and current (v o and i o ) parameters are referenced to gnd pin. load =1nf, f sw =300khz cc = v cc on - 0.1v blank blanking pulse d uration 8 13 24 s reset threshold 1.18 v blanking time of reset
ir1161lpbf 6 www.irf.com ? 20 15 international rectifier submit datasheet feedback june 1 , 2015 electrical characteristics v cc =1 2 v and t a =25c unless otherwise specified. the output voltage and current (v o and i o ) parameters are referenced to gnd pin. gate driver section i gate =100ma , v cc =12v v cc =12v, i gate =5ma v cc =5v, i gate =5ma c load =1nf, v cc =12v c load =1nf, v cc =12v v ds to v gate C v ds goes down from 6v to - 1v v ds to v gate C v ds goes up from - 1v to 6v ? ? i gate =100ma i gate = - 100ma gbd C parameter is guaranteed by design and is not tested.
ir1161lpbf 7 www.irf.com ? 20 15 international rectifier submit datasheet feedback june 1 , 2015 functional block diagram u v l o v d v c c v t h 2 g n d v g a t e v t h 3 v c c a r m i n g l o g i c & b l a n k i n g s e t m i n o n t i m e r e s e t d r i v e r c y c l e b y c y c l e m o t c h e c k c i r c u i t m o t v t h 1 q s r q
ir1161lpbf 8 www.irf.com ? 20 15 international rectifier submit datasheet feedback june 1 , 2015 i/o pin equivalent circuit diagram e s d d i o d e e s d d i o d e v c c g n d m o t v c c g n d g a t e e s d d i o d e e s d d i o d e v d g n d e s d d i o d e 2 0 0 v d i o d e r e s d
ir1161lpbf 9 www.irf.com ? 20 15 international rectifier submit datasheet feedback june 1 , 2015 pin definitions pin# symbol description 1 v cc supply voltage 2 gnd ground 3 mot minimum on time program input 4 vd fet drain sensing 5 gate gate drive output pin assignments detailed pin description vcc: power supply the supply voltage pin is monitored by the under voltage lockout circuit. it is possible to turn off the ic entering uvlo mode by pulling this pin below the mini mum turn off threshold voltage for micro power consumption. to avoid noise problems a bypass ceramic capacitor connected to vcc and gnd is needed, which should be placed as close as possible to the ic. a low value series resistor to vcc may also be added if extra filte ring is required. this pin is internally clamped to 20v. gnd: ground this is the ic ground reference connected to the sr mosfet source . mot: minimum on time the mot programming pin controls the amount of minimum on time. once v th2 is crossed for the firs t time, the gate signal will transition high and turn on the power mos fet. spurious ringing and oscillations can falsely trigger the input comparator to switch the output off. the mot prevents this by blank ing the input comparator to keep the sr mos fet on for a minimum time. the mot is typically programmed between 5 00ns and 2 us by using a n external resistor referenced to gnd. vd: drain voltage sense vd is the voltage sense pin for the sr mosfet d rain . this is a high voltage pin therefore particular care mu st be taken in properly routing the connection. an a dditional rc filter can be p laced at this input to improve noise immunity, however only small value s ( e.g. 100 + 100pf ) may be used to avoid introducing significant delay to the control input. gate: gate drive output the gate drive output provides 1a source and 2.5 a sink current capability. although this output may be directly connected to the power mosfet gate the use of a minimal gate resistor is recommended, especially when using multiple mos fets i n parallel. care must be taken to keep the gate loop as short and as small as possible in order to minimize inductance and achieve optimal switching performance. 5 4 1 2 3 i r 1 1 6 1 v c c g a t e g n d v d m o t
ir1161lpbf 10 www.irf.com ? 20 15 international rectifier submit datasheet feedback june 1 , 2015 application information and additional details state diagram uvlo mode the ic remains in the under - voltage lockout condition until vcc exceeds the turn on threshold voltage, v cc on . during the time the ic remains in the uvlo state, the gate drive circuit is inactive and only a very small quiescent current i cc star t is consumed . uvlo mode is accessible from any other operating state whenever vcc < v cc uvlo . normal mode and synchronized enable function the ic enters in to normal operating mode once the uvlo voltage has been exceeded. when the ic enters the normal mode, the gate output remains disabled (stays low) for a start - up delay time in the range of 100us, then v ds must transition above v th3 two times to enable synch ronous rectification . this ensures that the gate output can never be enabled in the middle of a switching cycle. the first gate pulse after activation is blocked and the c ycle by c ycle mot protection circuit is enabled . this logic avoids reverse currents t hrough the sr mosfet from occurring during startup . the gat e will continuously drive the sr mosfet after completing this startup sequence . mot protection mode if the secondary current conduction time is shorter than the mot (minimum on time), the followi ng driver output pulse is disabled. this function can avoid reverse current from occurring when the system is switching at very low duty - cycles under very light or zero load conditions . s ystem standby power consumption is reduced by disabling the gate output. the cycle by cycle mot c heck circuit is always activated under normal mode and mot protection mode so that the ic will automatically resume normal operation only once the load increases to a level where the secondary current conduction time ex ceeds mot. p o w e r o n g a t e i n a c t i v e u v l o m o d e v c c < v c c o n i c c < i c c s t a r t g a t e i n a c t i v e n o r m a l g a t e a c t i v e g a t e p w m o t c y c l e b y c y c l e m o t c h e c k e n a b l e d v c c > v c c o n , & v d s > v t h 3 v c c < v c c u v l o m o t p r o t e c t i o n m o d e g a t e o u t p u t d i s a b l e d v d s > v t h 1 @ m o t v d s < v t h 1 @ m o t
ir1161lpbf 11 www.irf.com ? 20 15 international rectifier submit datasheet feedback june 1 , 2015 general description the direction of the re ctified current in the sr mosfet is sensed by the ir1161 through its high voltage drain sensing input vd , which monitor s the drain to source voltage drop. conduction occurs through the body diode when the mosfet is switched off and when it is switched on , the r d s on acts as a shunt resistance . t he gate drive to the mosfet is switched on only when current is flowing from source to drain . internal blanking logic is used to prevent spurious transitions and guarantee correct operation under different load conditions . the ir1161 is suitable for dcm or crcm flyback and resonant half - bridge topologies. figure 1: input compa rator thresholds flyback application the typical application circuit of ir1161 in flyback converter is shown on page 1. turn - on phase when the conduction phase of the sr mos fet is initiated, current will start flowing through its body diode producing a negative v ds vo ltage across it. the body diode has a much higher forward voltage drop than that created by the mosfet on resistance and will therefore becoming more negative than the turn - on threshold v th2 . at that point the ir1161 will drive the gate h igh , which will in turn cause v ds to transition to a much smaller negative voltage . this voltage step is usually accompanied by some amount of ringing that could potentially trigger the ir1161 to turn off prematurely. to prevent this, a minimum on time (mo t) blanking period is maintain s the sr mosfet on for a minimum period of time , which is externally adjustable . turn - off phase at the end of the conduction period the current reduces to zero , causing v ds to cross the turn - off threshold v th1 . the ir1161 will then turn the sr mosfet gate off and current will star t flowing again through the body diode c ausing a negative going v ds voltage step . depending on the amount of residual current, v ds could potentially trigger the turn on threshold once again . f or this reason v th2 is blanked for a certain amount of time (t blank ) after v th1 has been triggered. the b lanking time is internally set and is reset only by v ds cross ing the positive threshold v th3 and remaining above this threshold for more than reset blanki ng time t brst . once reset the ir1161 is ready for next conduction cycle. v gate v th 1 v th 2 v th 3 v ds
ir1161lpbf 12 www.irf.com ? 20 15 international rectifier submit datasheet feedback june 1 , 2015 figure 2: flyback primary and secondary currents and voltages for dcm mode figure 3: flyback primary and secondary currents and voltages for crcm mode figure 4: flyback secondary side dcm/crcm operation g a t e d r i v e i s e c v d s b l a n k i n g t i m e t i m e t 1 t 2 v t h 1 v t h 2 v t h 3 t b l a n k i n g m o t t d o n t d o f f i prim i sec v sec v prim time time t 1 t 2 t 3 i prim i sec v sec v prim time time t 1 t 2
ir1161lpbf 13 www.irf.com ? 20 15 international rectifier submit datasheet feedback june 1 , 2015 resonant half - bridge application the typical application circuit of ir1161 in llc half - bridge is shown in figure 5. figure 5: resonant half - bridge application circuit in the resonant half - bridge converter the tur n - on phase and turn - off phase are similar to the flyback except that the current shape is sinusoid al . the typical operati ng waveform is seen below in figure 6 . figure 6: resonant half - bridge operation waveform l o a d 5 4 1 2 3 i r 1 1 6 1 v c c g a t e g n d v d 5 4 1 2 3 i r 1 1 6 1 v c c g a t e g n d v d m o t m o t g a t e d r i v e v d s b l a n k i n g t i m e t 1 t 2 v t h 1 v t h 2 v t h 3 m o t t b l a n k i d s
ir1161lpbf 14 www.irf.com ? 20 15 international rectifier submit datasheet feedback june 1 , 2015 setting the mot time the mot time is set by a n external resistor connected from the mot pin to gnd . t mot = 2 x 10 - 11 x r mot mot protection mode the mot protection function is designed to avoid reverse current occurring in the sr mosfet . this could happen at light load if the mot time is set longer that the actual conduction time . the i r1161 disables the gate drive output in mot protection mode as described in the previous section and automatica lly resume s normal operation when the load increas es to a level where the current conduction time is longer than mot. this function works in both flyback and resonant half - bridge topologies. figure 7 illustrates operation in a dcm flyback converter. figure 7: mot protection mode t i m e i s e c v d s g a t e d r i v e m o t s e n s e d v d > v t h 1 a t t h e e n d o f m o t d i s a b l e t h e n e x t g a t e o u t p u t
ir1161lpbf 15 www.irf.com ? 20 15 international rectifier submit datasheet feedback june 1 , 2015 synchronized enable function this function guarantees that the gate drive always switch es high at the beginning of a switching cycle. this is essential since mid - cycle switch on with the mot function would force the mosfet to remain on past the conduction period leading to reverse conduction. this function works in both flyback and resonant half - bridge topologies. figure 8 is an example in resonant half - bridge converter. figure 8: synchr onized enable function (resonant half - bridge) driving a logic level mosfet an e xternal gate drive pull down circuit is recommended when driving a logic level mosfet . this is because during power up and power down the drain may be switching while the ir1161 remains in uvlo. sr mosfet drain to gate capacitance causes voltage pulses to appear at the gate that could have sufficient amplitude to reach the turn on threshold because the ir1161 gate sink capability is limited when vcc < 2v. the following circuit ensures that the gate voltage remains below 1v under all conditions: figure 9: gate drive circuit for logic level sr mosfet v d s i d r a i n v g a t e u v l o i c a c t i v a t e d i n t h e m i d d l e o f a c o n d u c t i o n c y c l e , v g a t e s t a y s l o w . v g a t e h a s o u t p u t f r o m t h e 4 t h c y c l e v t h 3 v d e x c e e d s v t h 3 f o r 2 c y c l e s t h e f i r s t g a t e p u l s e i s b l a n k e d . e n a b l e m o t p r o t e c t i o n . 5 4 1 2 3 i r 1 1 6 1 v c c g a t e g n d v d m o t s r m o s f e t q s i n k c v c c r m o t r g d g r b
ir1161lpbf 16 www.irf.com ? 20 15 international rectifier submit datasheet feedback june 1 , 2015 vcc clamping circuit the ir1161 can be directly biased by the converter output voltage v out if this falls within the recommended range of vcc although a low value series resistor may be required for optimal noise filtering. for higher system output voltages a clamping circuit is recommended to limit vcc . this also lowers the gate drive voltage and reduc es losses if v out is above 15v. m any clamping circuits are available from simple zener diode clamping to bipolar linear regulators. figure 10 is one example; in this circuit the vcc voltage will be clamped to a voltage of v out - v zd1 - v be . th e circuit also provides turn - on delay to the ir1161, which will activate only when the output voltage exceeds v ccon + v zd1 + v be . r1 and r2 are optional for more precise control of the vcc clamping voltage. figure 10 : vcc cl amping circuit shutdown circuit the ir1161 can be disabled by pulling v cc below the v cc uvlo threshold. figure 11 : ir1161 enable/disable circuit 5 4 1 2 3 i r 1 1 6 1 v c c g a t e g n d v d m o t r 1 z d 1 v o u t c v c c r 3 r 2 o p t i o n a l 5 4 1 2 3 i r 1 1 6 1 v c c g a t e g n d v d m o t z d 1 v o u t c v c c r 3 r 1 s h u t d o w n
ir1161lpbf 17 www.irf.com ? 20 15 international rectifier submit datasheet feedback june 1 , 2015 general timing waveform figure 12 : timing waveform 1 0 % 9 0 % t r i s e v t h 2 t f a l l v t h 1 t d o f f t d o n v d s v g a t e
ir1161lpbf 18 www.irf.com ? 20 15 international rectifier submit datasheet feedback june 1 , 2015 figure 1 3 : undervoltage lockout vs. temperature figure 14 : icc quiescent current vs. temperature figure 1 5 : icc supply current @1nf load vs. temperature figure 1 6 : icc startup current vs. temperature 4.3 4.4 4.5 4.6 4.7 -50 c 0 c 50 c 100 c 150 c vcc uvlo thresholds (v) temperature vcc on vcc uvlo 0.50 0.55 0.60 0.65 0.70 -50 c 0 c 50 c 100 c 150 c i qcc quiescent current (ma) temperature i qcc 4.6 4.7 4.8 4.9 5.0 5.1 5.2 5.3 5.4 5.5 5.6 -50 c 0 c 50 c 100 c 150 c i cc supply current (ma) temperature icc @300khz, c load =1nf 6.0 7.0 8.0 9.0 10.0 11.0 12.0 13.0 -50 c 0 c 50 c 100 c 150 c i cc startup current (ua) temperature i cc start
ir1161lpbf 19 www.irf.com ? 20 15 international rectifier submit datasheet feedback june 1 , 2015 figure 1 7 : v th1 vs. temperature figure 18 : v th2 vs. temperature figure 1 9 : v th 3 vs. temperature figure 20 : mot time vs. temperature -6.0 -5.0 -4.0 -3.0 -2.0 -50 c 0 c 50 c 100 c 150 c v th1 threshold (mv) temperature -260.0 -250.0 -240.0 -230.0 -220.0 -210.0 -200.0 -50 c 0 c 50 c 100 c 150 c v th2 thresholds (mv) temperature 1.10 1.12 1.14 1.16 1.18 1.20 -50 c 0 c 50 c 100 c 150 c v th3 thresholds (v) temperature 0 1 2 3 -50 c 0 c 50 c 100 c 150 c minimum on time (us) temperature rmot=100k rmot=50k rmot=24k
ir1161lpbf 20 www.irf.com ? 20 15 international rectifier submit datasheet feedback june 1 , 2015 figure 21 : blanking time vs. temperature figure 22: tr and tf vs. temperature figure 23 : t don and t doff vs. temperature figure 24 : r up and r down vs. temperature 12.0 12.5 13.0 13.5 -50 c 0 c 50 c 100 c 150 c blanking time (us) temperature 0 ns 5 ns 10 ns 15 ns 20 ns 25 ns 30 ns -50 c 0 c 50 c 100 c 150 c tr and tf time at 1nf load temperature tr tf 35 ns 40 ns 45 ns 50 ns 55 ns 60 ns 65 ns 70 ns 75 ns -50 c 0 c 50 c 100 c 150 c propagation delay temperature turn-on propagation delay turn-off propagation delay 0 2 4 6 8 10 12 14 -50 c 0 c 50 c 100 c 150 c resistance ( ) temperature rup rdown
ir1161lpbf 21 www.irf.com ? 20 15 international rectifier submit datasheet feedback june 1 , 2015 package details: 5 lead sot23
ir1161lpbf 22 www.irf.com ? 20 15 international rectifier submit datasheet feedback june 1 , 2015 tape and reel details: 5 lead sot23
ir1161lpbf 23 www.irf.com ? 20 15 international rectifier submit datasheet feedback june 1 , 2015 tape and reel details: 5 lead sot23
ir1161lpbf 24 www.irf.com ? 20 15 international rectifier submit datasheet feedback june 1 , 2015 part marking information: 5 lead sot23 top marking bottom marking y w l c l o t c o d e d a t e c o d e g i r l o g o p a r t n o .
ir1161lpbf 25 www.irf.com ? 20 15 international rectifier submit datasheet feedback june 1 , 2015 qualification information ? qualification level industrial ?? comments: this family of i c s has passed jedecs industrial qualification. irs consumer qualification level is granted by extension of the higher industrial level. moisture sensitivity level sot - 23 5l msl 3 ??? (per ipc/jedec j - std - 020) esd machine model class a (per jedec standard jesd22 - a115) human body model class 1a (per eia/jedec standard eia/jesd22 - a114) ic latch - up test class i, level a (per jesd78) rohs compliant yes ? qualification standards can be found at international rectifiers web site http://www.irf.com/ ?? higher qualification ratings may be available should the user have such requirements. please contact your international rectifier sales representative for further information. ??? higher msl ratings may be available for the specific package types listed here. please contact your international rectifier sales representative for further information. the information provided in this document is believed to be accurate and reliable. however, international rectifier assumes n o responsibility for the consequences of the use of this information. international rectifier assumes no responsibility for an y in fringement of patents or of other rights of third parties which may result from the use of this information. no license is granted by i mplication or otherwise under any patent or patent rights of international rectifier. the specifications mentioned in t his document are subject to change without notice. this document supersedes and replaces all information previously supplied. for technical support, please contact irs technical assistance center htt p://www.irf.com/technical - info/ world headquarters: 233 kansas st., el segundo, california 90245 tel: (310) 252 - 7105

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